DESKTOP-PUHFO60\dsx2016 ee2ca3edfc Align 3.5C pins with CYD_PROJECT_GUIDE: TFT_BL=27, SGP30 SDA22/SCL21. ...

Leave 2.8 wiring unchanged; release GT911 INT after reset so SCL21 can share CN1.

Co-authored-by: Cursor <cursoragent@cursor.com>

2026-10-25 10:53:33 +08:00

2.3 KiB

Raw Permalink Blame History

View Raw